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Basic Rate Interface (BRI) Feature

Description: Clock Synchronization

Clock synchronization is an arrangement where digital facilities operate from a common clock. Whenever digital signals are transmitted over a communications path, the receiving end must be synchronized with the transmitting end in order to receive the digital signals without errors.

The system synchronizes itself by extracting the timing signal from the incoming digital stream. If the system has one 100D/100R/100 DCD module, that module provides its own primary synchronization. If the system has at least one 800 NI-BRI module, more than one 100D/100R/100 DCD module, or a combination of 100D/100R/100 DCD modules and 800 NI-BRI modules, then one of the connections provides primary clock synchronization for all 800 NI-BRI and 100D/100R/100 DCD module ports and for the system's time-division multiplexing (TDM) bus. The primary clock synchronization source must be identified during system programming. The factory setting is the first 100D/100R/100 DCD module in service or the first port in service on the first 800 NI-BRI module in the carrier. This can be changed through system programming.

In the event of a maintenance failure of primary synchronization, backup synchronization can be provided by secondary and tertiary clock synchronization.

In addition, the source of synchronization is factory-set to Loop Clock Reference Source, so that the clock is synchronized to the outside source. With a 100D/100R/100 DCD module, it can be set to Local Clock Reference Source so that the clock is free-running. However, this is not recommended for most permanent installations and systems with PRI. This setting must be made for the primary, secondary, and tertiary synchronization sources.

On a frigid start (System Erase), the first 100D/100R/100 DCD or BRI port in service is the default primary loop clock source.

The following lists the options for primary, secondary, and tertiary clock synchronization sources in order of preference:

1. The clock sources on BRI ports with DSLs in service. If at all possible, all three clock sources should be on the same 800 NI-BRI module.
   
   
2. The loop clock source on any 100D, 100R INA, or 100 DCD module.
   
   
3. The loop clock source on any 100D, 100R INA, or 100 DCD module in T1 mode emulating tie trunks.
   
   
4. The local clock source on any 100D, 100R INA, or 100 DCD module.

Ports that are not in service should never be programmed as clock sources.

Topics
	Description
	Terminology Clock Synchronization Clock Switching Timers and Counters Call Processing
	At a Glance
	Considerations & Constraints
	System Programming
	Feature Interactions