Managing F-chip Memory

The reconfiguration of Hash Mode can cause a secondary effect: increased cache usage. By default, the IP Unicast Cache size is 15,000 entries per F-chip. Although this can be used up simply due to a high number of flows (for example, a proxy server for the internet), the SA-DA Hash Mode setting always causes more flows to be identified than in the DA-only mode.

The F-chip memory can accommodate approximately 70,000 total entries for routed (L3) flows. This number comprises IP Unicast, IP Multicast, and IPX entries for that F-chip.

To view the current total number of entries for the CPU, expand the Routing > L3 Forwarding Cache folders, and then click Cache Configuration. The Total Current Entries field displays the current total entries for the CPU.

To view the current total number of entries for each F-chip, expand the Routing > L3 Forwarding Cache folders, and then click Cache Contents. The Active FE Web page is displayed in the content pane. See Figure�140.

As long as these totals stay under 70K, it is safe to increase the IP Unicast Maximum Entries to prevent overflow. If the switch is not routing IPX or has minimal IP Multicast traffic, it is generally safe to double the IP Unicast maximum to 30,000.

When you enable an ACL, the switch may change the maximum number of forwarding entries for IP unicast traffic to improve the performance of the switch. If the maximum number of entries is set to:

• Less than 15,000, the switch automatically doubles the setting.
• Between 15,000 and 30,000, the switch changes the setting to 30,000.
• Greater than 30,000, the switch does not change the setting.

Important: Changing the Maximum Cache Entries parameter affects every L3-enabled F-chip on the P580/P882.